Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

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Buffers

The PL123E-09 (-09H for High Drive) is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks. It has two low-skew output banks, of 4 outputs each, that are synchronized with the input. Control of the two banks of outputs is achieved by using the S1 and S • Frequency Range 10MHz to 220MHz\n• Low output-to-output skew\n• Standard (8mA) PL123E-09\n• 2.5V or 3.3V ±10% operation\n• Available in 16-Pin SOP or TSSOP packages;

Microchip

微芯科技

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

Low Skew Zero Delay Buffer

文件：384.27 Kbytes 页数：10 Pages

Micrel

麦瑞半导体