Low Skew Output Buffer

文件：287.78 Kbytes 页数：7 Pages

Micrel

麦瑞半导体

Low Skew Output Buffer

文件：287.78 Kbytes 页数：7 Pages

Micrel

麦瑞半导体

Low Skew Output Buffer

文件：287.78 Kbytes 页数：7 Pages

Micrel

麦瑞半导体

Low Skew Output Buffer

DESCRIPTION The PLL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOIC or MSOP package. It has two outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the

文件：180.37 Kbytes 页数：6 Pages

PLL