1:5 Clock Distribution

Description The PI90LV14 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320MHz with low skew. The PI90LV14 is a low-skew 1:5 clock distribution chip which incorporates multiplexed clock inputs to allow for distribution of a lower-speed, single-ended clo

文件：121.24 Kbytes 页数：6 Pages

PERICOMPericom Semiconductor Corporation

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1:6 Differential Clock Distribution Chip

Description The PI90LV211 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320 MHz with low skew. The PI90LV211 is a low skew 1:6 fanout device designed explicitly for low skew clock distribution applications. The device features a multiplexed clock i

文件：185.51 Kbytes 页数：9 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体

1:6 Differential Clock Distribution Chip

Description The PI90LV211 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320 MHz with low skew. The PI90LV211 is a low skew 1:6 fanout device designed explicitly for low skew clock distribution applications. The device features a multiplexed clock i

文件：185.51 Kbytes 页数：9 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体

1:6 Differential Clock Distribution Chip

Description The PI90LV211 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320 MHz with low skew. The PI90LV211 is a low skew 1:6 fanout device designed explicitly for low skew clock distribution applications. The device features a multiplexed clock i

文件：185.51 Kbytes 页数：9 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体

1:6 Differential Clock Distribution Chip

Description The PI90LV211 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320 MHz with low skew. The PI90LV211 is a low skew 1:6 fanout device designed explicitly for low skew clock distribution applications. The device features a multiplexed clock i

文件：185.51 Kbytes 页数：9 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体

1:6 Differential Clock Distribution Chip

Description The PI90LV211 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320 MHz with low skew. The PI90LV211 is a low skew 1:6 fanout device designed explicitly for low skew clock distribution applications. The device features a multiplexed clock i

文件：185.51 Kbytes 页数：9 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体

High-Speed Differential Line Receivers

Description The PI90LVx386 family consists of sixteen differential line receivers with 3-state outputs that implement Low-Voltage Differential Signaling (LVDS). Any of the differential receivers will provide a valid logical output state with a ±100mV differential input voltage within the input co

文件：165.59 Kbytes 页数：8 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体

SOTiny LVDS High-Speed Differential Line Receiver

文件：364.76 Kbytes 页数：9 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体

3V LVDS Quad Flow-Through Differential Line Receivers

文件：335.69 Kbytes 页数：6 Pages

PERICOMPericom Semiconductor Corporation

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3V LVDS Quad Flow-Through Differential Line Receivers

文件：335.69 Kbytes 页数：6 Pages

PERICOMPericom Semiconductor Corporation

百利通百利通半导体