丝印：100101；Package：SOT1215；50 V, 500 mA PNP resistor-equipped transistors

1.1 General description PNP Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. 1.2 Features and benefits 1.3 Applications Table 1. Product overview Type number R1 R2 Pac

文件：2.00194 Mbytes 页数：22 Pages

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安世安世半导体(中国)有限公司

50 V, 500 mA NPN resistor-equipped transistors

Features and benefits  500 mA output current capability  Built-in bias resistors   10 resistor ratio tolerance  Simplifies circuit design  Reduces component count  Reduced pick and place costs  Low package height of 0.37 mm  Suitable for Automatic Optical Inspection (AOI) of sold

文件：1.96439 Mbytes 页数：22 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：100101；Package：SOT1215；50 V, 500 mA PNP resistor-equipped transistors

Features and benefits  500 mA output current capability  Built-in bias resistors   10 resistor ratio tolerance  Simplifies circuit design  Reduces component count  Reduced pick and place costs  Low package height of 0.37 mm  Suitable for Automatic Optical Inspection (AOI) of sold

文件：2.00195 Mbytes 页数：22 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

50 V, 500 mA PNP resistor-equipped transistors

PNP Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. • 500 mA output current capability\n• Built-in bias resistors\n• ± 10% resistor ratio tolerance\n• Simplifies circuit design\n• Reduces component count\n• Reduced pick and place cost\n• Low package height of 0.37 mm\n• Suitable for Automatic Optical Inspection (AOI) of solder joint\n• AEC-Q101 q;

Nexperia

安世

Package：3-XDFN 裸露焊盘；包装：卷带（TR） 类别：分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置 描述：TRANS PREBIAS PNP 3DFN

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司