50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1110D-3 (SOT8015) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

文件：363.22 Kbytes 页数：20 Pages

NEXPERIA

安世

50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1110D-3 (SOT8015) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

文件：362.42 Kbytes 页数：20 Pages

NEXPERIA

安世

50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint

文件：365.74 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：8G；Package：DFN1412D-3；50 V, 100 mA PNP resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint

文件：365.87 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：8G；Package：DFN1412D-3；50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

文件：365.63 Kbytes 页数：20 Pages

NEXPERIA

安世

50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint • Qualified according to AEC-Q

文件：366.42 Kbytes 页数：20 Pages

NEXPERIA

安世

50 V, 100 mA NPN resistor-equipped transistors

1. General description 100 mA NPN Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC PNP complement: PDTC14

文件：366.55 Kbytes 页数：20 Pages

NEXPERIA

安世

50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

文件：365.76 Kbytes 页数：20 Pages

NEXPERIA

安世

50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

文件：365.76 Kbytes 页数：20 Pages

NEXPERIA

安世

PNP resistor-equipped transistors; R1 = 4.7 k廓, R2 = 47 k廓

DESCRIPTION PNP resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • General purpose switching and amplif

文件：181.54 Kbytes 页数：14 Pages

恩XP