丝印：101110；Package：DFN1010D-3；50 V, 100 mA PNP resistor-equipped transistors

General description 100 mA PNP Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. Features and benefits ■ 100 mA output current capability ■ reduced pick and place costs

文件：2.80964 Mbytes 页数：21 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

50 V, 100 mA NPN resistor-equipped transistors

Features and benefits  100 mA output current capability  Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduced pick and place costs  Low package height of 0.37 mm  AEC-Q101 qualified  Suitable for Automatic Optical Inspection (AOI) of solder joint

文件：2.78427 Mbytes 页数：21 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：101110；Package：DFN1010D-3；50 V, 100 mA PNP resistor-equipped transistors

Features and benefits  100 mA output current capability  built-in bias resistors  simplifies circuit design  reduces component count  reduced pick and place costs  low package height of 0.37 mm  AEC-Q101 qualified  suitable for Automatic Optical Inspection (AOI) of solder joint

文件：2.80866 Mbytes 页数：21 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：101110；Package：SOT1215；50 V, 100 mA PNP resistor-equipped transistors

1.1 General description 100 mA PNP Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. 1.2 Features and benefits 1.3 Applications Table 1. Product overview Type number R1

文件：2.80864 Mbytes 页数：21 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

50 V, 100 mA PNP resistor-equipped transistors

100 mA PNP Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. • 100 mA output current capability\n• Built-in bias resistors\n• Simplifies circuit design\n• Reduces component count\n• Reduced pick and place costs\n• Low package height of 0.37 mm\n• AEC-Q101 qualified\n• Suitable for Automatic Optical Inspection (AOI) of solder joint;

Nexperia

安世

Package：3-XDFN 裸露焊盘；包装：卷带（TR） 类别：分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置 描述：TRANS PREBIAS PNP 50V DFN1010D-3

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司