1:10 LVTTL clock distribution device

OverviewThis low skew clock driver offers 1:10 fan-out. The large fan out from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The PCK3807A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and ground \n\n•Low output skew < 120 ps (max)\n\n•Very low duty cycle distortion < 200 ps (max) for VCC = 2.5 V\n\n•High speed: propagation delay < 3.5 ns (max)\n\n•Very low CMOS power levels\n\n•TTL compatible inputs and outputs\n\n•1:10 fanout\n\n•Maximum output rise and fall times < 1.5 ns\n\n•Low input ca;

恩XP

恩智浦

1:10 LVTTL clock distribution device

文件：127.14 Kbytes 页数：13 Pages

PHI

飞利浦

1:10 LVTTL clock distribution device

文件：127.14 Kbytes 页数：13 Pages

PHI

飞利浦

1:10 LVTTL clock distribution device

文件：127.14 Kbytes 页数：13 Pages

PHI

飞利浦

CABLE ASSEMBLY BNC MALE TO BNC MALE

文件：107.34 Kbytes 页数：1 Pages

PASTERNACK