2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

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丝印：PCA9641；Package：TSSOP16；2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

丝印：641；Package：HVQFN16；2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

2-channel I2C-bus master arbiter

The PCA9641 is a 2-to-1 I²C master demultiplexer with an arbiter function. It is designedfor high reliability dual master I²C-bus applications where correct system operation isrequired, even when two I²C-bus masters issue their commands at the same time. Thearbiter will select a winner and let it wo 2-to-1 bidirectional master selector\nChannel selection via I²C-bus\nI²C-bus interface logic; compatible with SMBus standards\n2 active LOW interrupt outputs to master controllers\nActive LOW reset input\nSoftware reset\nFour address pins allowing up to 112 different addresses\nArbitration active wh;

恩XP

2-channel I2C-bus master arbiter

The PCA9641 is a 2-to-1 I²C master demultiplexer with an arbiter function. It is designedfor high reliability dual master I²C-bus applications where correct system operation isrequired, even when two I²C-bus masters issue their commands at the same time. Thearbiter will select a winner and let it wo 2-to-1 bidirectional master selector\nChannel selection via I²C-bus\nI²C-bus interface logic; compatible with SMBus standards\n2 active LOW interrupt outputs to master controllers\nActive LOW reset input\nSoftware reset\nFour address pins allowing up to 112 different addresses\nArbitration active wh;

恩XP