丝印：PCA9641；Package：TSSOP16；2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

丝印：PCA9641；Package：TSSOP16；2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

丝印：641；Package：HVQFN16；2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP

2-channel I2C-bus master arbiter

Features and benefits  2-to-1 bidirectional master selector  Channel selection via I2C-bus  I2C-bus interface logic; compatible with SMBus standards  2 active LOW interrupt outputs to master controllers  Active LOW reset input  Software reset  Four address pins allowing up to 112 dif

文件：1.67753 Mbytes 页数：55 Pages

恩XP