Expandable 5-channel I2C-bus hub

General description The PCA9518A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thu

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Smart, simple solutions for the 12 most common design concerns

文件：727.81 Kbytes 页数：8 Pages

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Expandable 5-channel I2C-bus hub

General description The PCA9518A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thu

文件：126.17 Kbytes 页数：23 Pages

恩XP

Expandable 5-channel I2C-bus hub

General description The PCA9518A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thu

文件：126.17 Kbytes 页数：23 Pages

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可扩展的5通道I2C总线集线器

PCA9518A是一款CMOS集成电路，主要用于I²C总线和SMBus系统应用。\n在保留I²C总线系统所有工作模式和功能的同时，它允许通过缓冲数据(SDA)和时钟(SCL)线路以允许扩展I²C总线，从而可使用几乎无限条400 pF的总线。\n400 pF的I²C总线电容极限会限制器件数和总线长度。使用PCA9518A能使系统设计师将总线分成集线器的若干个区段，没有数目限制，其中任何区段至区段转变只会看到一个转发器延迟且每个区段上均有多主器件能力。\n使用多个PCA9518A部件，可使用扩展引脚使用任意宽度的集线器（五的倍数）1。\nPCA9518A是PCA9518的宽范围电压（2.3 V至3 可扩展5通道、双向缓冲器\n兼容I²C总线和SMBus\n高电平有效的独立转发器使能输入\n开漏输入/输出\n无锁定操作\n支持横跨转发器的仲裁和时钟展宽\n适应标准模式和快速模式I²C总线器件以及多主器件\n断电高阻抗I²C总线引脚\n2.3 V至3.6 V的工作电源电压范围\n5 V耐受I²C总线和使能引脚\n0 Hz至400 kHz时钟频率²\nESD保护：按JESD22-A114超过2000 V HBM，按JESD22-A115超过200 V MM，按JESD22-C101超过1000 V CDM\n已按照JEDEC标准JESD78完成闭锁测试，超过100 mA\n提供封装：SO20和;

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恩智浦

Expandable 5-channel I2C-bus hub

The PCA9518A is a CMOS integrated circuit intended for application in I²C-bus and SMBus systems.\nWhile retaining all the operating modes and features of the I²C-bus system, it permits extension of the I²C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling virtually an unl Expandable 5 channel, bidirectional buffer\nI²C-bus and SMBus compatible\nActive HIGH individual repeater enable inputs\nOpen-drain input/outputs\nLock-up free operation\nSupports arbitration and clock stretching across the repeater\nAccommodates Standard-mode and Fast-mode I²C-bus devices and multi;

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恩智浦