P80CE598FFB数据手册恩XP中文资料规格书

描述 Description

Overview The P8xCE598 is a single-chip 8-bit high-performance microcontroller with on-chip CAN-controller, derived from the 80C51 microcontroller family. It uses the powerful 80C51 instruction set. The P8xCE598 is manufactured in an advanced CMOS process, and is designed for use in automotive and general industrial applications. In addition to the 80C51 standard features, the device provides a number of dedicated hardware functions for these applications.
Two versions of the P8xCE598 will be offered:
P80CE598 (without ROM)
P83CE598 (with ROM)
Hereafter these versions will be referred to as P8xCE598.
The temperature range includes (max. fCLK= 16 MHz):
-40 to +85 °C version, for general applications
-40 to +125 °C version for automotive applications.
The P8xCE598 combines the functions of P8XC552 (microcontroller) and the PCA82C200 (Philips CAN-controller) with the following enhanced features:
32 kbytes Program Memory
2 x 256 bytes Data Memory
DMA between CAN Transmit/Receive Buffer and internal RAM. The main differences to the P8xC552 microcontroller are:
32 kbytes programmable ROM (P8xC552 has 8 kbytes)
Additional 256 bytes RAM
A CAN-controller instead of the I²C-serial interface.
Electromagnetic Compatibility (EMC)
Primary attention is paid to the reduction of electromagnetic emission of the microcontroller P8xCE598. The following features reduce the electromagnetic emission and additionally improve the electromagnetic susceptibility:
One analog part power supply pin (AVDD ) and one analog part ground pin (AVSS ), placed as a pair of pins on one side of the package , providing power supply (+5V) and ground for ADC, CAN receiver and reference voltage.
Four digital part supply voltage pins (VDD1 to VDD4 ) and four digital part ground pins (VSS1 to VSS4 ) are provided on the package. These pins, one VDD and one VSS as a pair of pins are placed on each of the four sides of the package to provide:
- VDD1 /VSS1 for internal logic (CPU, Timers/counters, Memory, CAN, UART, ADC)
- VDD2 /VSS2 for Port 1, Port 3 and Port 4, and PWM0 and PWM1 outputs
- VDD3 /VSS3 for the on-chip oscillator
- VDD4 /VSS4 for the Port 0, Port 2, ALE output and PSEN output.

External capacitors should be connected across associated VDDx and VSSx pins (i.e. VDD1 and VSS1 ). Lead length should be as short as possible. Ceramic chip capacitors are recommended (100 nF).
One CAN supply voltage pin (CVDD ) and one CAN ground pin (CVSS ) as a pair of pins placed on one side of the package providing (digital part) power supply (+5V) and ground for the CAN transmitter outputs.
Internal decoupling capacitance improves the EMC radiation behaviour and the EMC immunity.
Recommendation on ALE
For application that require no external memory or temporarily no external memory: the ALE output signal (pulses at a frequency of 1 ?6 fOSC) can be disabled under software control (bit 5 in PCON SFR: ?RFI?); if disabled, no ALE pulse will occur. ALE pin will be pulled down internally, switching an external address latch to a quiet state. The MOVX instruction will still toggle ALE as a normal MOVX.
ALE will retain its normal HIGH value during Idle mode and a LOW value during Power-down mode while in the ?RFI reduction mode?.
Additionally during internal access (EA = 1) ALE will toggle normally when the address exceeds the internal Program Memory size. During external access (EA = 0) ALE will always toggle normally, whether the flag ?RFI? is set or not.

特性 Features

80C51 central processing unit (CPU)
32 kbytes on-chip ROM, externally expandible to 64 kbytes
2 x 256 bytes on-chip RAM, externally expandible to 64 kbytes
Two standard 16-bit timers/counters
One additional 16-bit timer/counter coupled to four capture and three compare registers
10-bit ADC with 8 multiplexed analog inputs
Two 8-bit resolution Pulse Width Modulated outputs
15 interrupt sources with 2 priority levels (2 to 6 external interrupt sources possible)
Five 8-bit I/O ports, plus one 8-bit input port shared with analog inputs
CAN-controller (CAN = Controller Area Network) with DMA data transfer facility to internal RAM
1 Mbit/s CAN-controller with bus failure management facility
1/2 AVDD reference voltage
Full-duplex UART compatible with the standard 80C51
On-chip Watchdog Timer (WDT)
1.2 to 16 MHz clock frequency
Improved Electromagnetic Compatibility (EMC).

应用 Application

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