Quad Bus Buffer

文件：70.8 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad Bus Buffer

文件：70.8 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad Bus Buffer

文件：121.42 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Bus Buffer

文件：70.8 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad Bus Buffer

文件：121.42 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Bus Buffer with 3?뭆tate Control Inputs

文件：92.58 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Bus Buffer with 3?뭆tate Control Inputs

文件：92.58 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Bus Buffer with 3?뭆tate Control Inputs

文件：92.58 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Quad Bus Buffer with 3-state Control Inputs

The NLSF3T125 is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. __The NLSF3T125 requires the 3-state control input (OE)to be set High to place th • High Speed: tpD = 3.8 ns (Typ) at VCC = 5.0 V\n• TTL-Compatible Inputs: VIL = 0.8 VIH = 2.0 V\n• Balanced Propagation Delays\n• Low Noise: VOLP = 0.8 V (Max)\n• Latchup Performance Exceeds 300 mA\n• Chip Complexity: 72 FETS or 18 Equivalent Gates\n• Pb-Free Package is Available;

ONSEMI

安森美半导体

Quad Bus Buffer with 3-state Control Inputs

The NLSF3T126 is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.The NLSF3T126 requires the 3-state control input (OE)to be set Low to place the ou • High Speed: tpD = 3.8 ns (Typ) at VCC = 5.0 V\n• Low Power Dissipation: ICC = 4.0 µA (Max) at TA = 25°C\n• TTl-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V\n• Power Down Protection Provided on Inputs\n• Balanced Propagation Delays\n• Designed for 2.0 V to 5.5 V Operating Range\n• Low Noise: VOLP = ;

ONSEMI

安森美半导体