2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination

文件：202.21 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

CML Outputs and Internal Termination

文件：229.16 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

CML Outputs and Internal Termination

文件：229.16 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination

文件：202.21 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination

文件：202.21 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

CML Outputs and Internal Termination

文件：229.16 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination

文件：202.21 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination

文件：202.21 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

CML Outputs and Internal Termination

文件：229.16 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

Clock / Data Fanout Buffer / Translator, 2.5 V / 3.3 V, with CML Outputs and Internal Termination

The NB7L11M is a differential 1-to-2 clock/data distribution chip with internal source termination and CML output structure, optimized for low skew and minimal jitter. The device produces two identical output copies of clock or data operating up to 8 GHz or 12 Gb/s, respectively.Inputs incorporate i • Maximum Input Clock up to 8 GHz Typical\n• Maximum Input Data Rate up to 12Gb/s Typical\n• \n• \n• 30 ps Typical Rise and Fall Times\n• 110 ps Typical Propogation Delay\n• 3 ps Typical Within Device Skew\n• Operatiing Range: VCC = 2.375V to 3.465V with VEE = 0V\n• CML Output Level (400 mV Peak-to-;

ONSEMI

安森美半导体