NB6L611中文资料时钟/数据扇出缓冲器，1:2 差分，3 GHz / 2.5 V / 3.3 V，带 LVPECL 输出数据手册ONSEMI规格书

描述 Description

The NB6L611 is a differential 1:2 clock or data fanout buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VTD pins and will accept LVPECL, CML, LVDS, LVCMOS or LVTTL logic levels. The VREFAC pin is an internally generated voltage supply available to this device only. VREFAC is used as a reference voltage for single-ended PECL or NECL inputs. For all single-ended input conditions, the unused complementary differential input is connected to VREFAC as a switching reference voltage. VREFAC may also rebias capacitor-coupled inputs. When used, decouple VREFAC with a 0.01uF capacitor and limit current sourcing or sinking to 0.5mA. When not used, VREFAC output should be left open. The device is housed in a small 3mm x 3mm 16-pin QFN package. The NB6L611 is a member of the ECLinPS MAX family of high performance clock and data management products.

特性 Features

• Maximum Input Clock Frequency > 3.0 GHz
• High Performance Applications
• VREFAC Reference Output
• Rebias Capacitor-coupled Input Signal
• Internal Input Termination Resistors, 50-ohm
• No external components needed for inputs

应用 Application

• Clock / Data Distribution

简介

NB6L611属于开发板套件编程器的评估演示板及套件。由制造生产的NB6L611评估和演示板及套件该系列产品提供了一种方便的方法，在经过验证的实施环境中评估某些重点器件的性能或特性。评估方法通常有完善的文档说明，并且视乎具体情况由评估软件提供支持。产品通常由印刷电路板组成，板上已装有重点器件以及必要或有用的支持元器件，另外也可能包括其他组件，例如电缆或电源。对于数量特别多或类别独特的器件类别(如 ADC、DAC 和开关模式电源)，评估平台可组合为一个单独的产品系列。