NB6L239中文资料2.5 V / 3.3 V Any Differential Clock In to Differential LVPECL Out数据手册ONSEMI规格书

描述 Description

The NB6L239 is a high-speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; divide 1/2/4/8 and divide 2/4/8/16. Both divider circuits drive a pair of LVPECL outputs

特性 Features

• Maximum Clock Input Frequency; ≥ 3GHz
• Input compatibility with LVDS/LVPECL/CML/HSTL
• 70 ps Typical Rise/Fall Times
• 5 ps Typcial Output-to-Output Skew
• Ex. 622.08MHz Input Generates 38.88MHz to 622.08 MHz Outputs
• Internal 50 Ω Termination Provided
• Random Clock Jitter ≤ 1 ps RMS
• Divide-by-1 Edge of QA Aligned to QB divided Output
• Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
• Master Reset for Synchronization of Multiple Chips
• VBBAC Reference Output
• Synchronous Output Disable/Enable
• Telecom/Datacom Routers, Swithes
• Pb-Free Packages are Available

应用 Application

• Analog-to-Digital Converter Precision Timing
• SONET/SDH Reference Clock Division

简介

NB6L239属于开发板套件编程器的评估演示板及套件。由制造生产的NB6L239评估和演示板及套件该系列产品提供了一种方便的方法，在经过验证的实施环境中评估某些重点器件的性能或特性。评估方法通常有完善的文档说明，并且视乎具体情况由评估软件提供支持。产品通常由印刷电路板组成，板上已装有重点器件以及必要或有用的支持元器件，另外也可能包括其他组件，例如电缆或电源。对于数量特别多或类别独特的器件类别(如 ADC、DAC 和开关模式电源)，评估平台可组合为一个单独的产品系列。