NB3L8504S数据手册集成电路（IC）的时钟缓冲器驱动器规格书PDF

描述 Description

The NB3L8504S is a differential 1:4 LVDS fanout buffer/translator with OE control for each differential output. The differential inputs which can be driven by either a differential or single−ended input, can accept various logic level standards such as
LVPECL, LVDS, HSTL, HCSL and SSTL. These signals are then translated to four identical LVDS copies of the input up to 700 MHz. As such, the NB3L8504S is ideal for Clock distribution applications that require low skew.

特性 Features

• Four Differential LVDS Outputs
• Each Differential Output has OE Control
• 700 MHz Maximum Output Frequency
• 660 ps Max Output Rise and Fall Times, LVCMOS
• Translates Differential Input to LVDS Levels
• Additive Phase Jitter RMS:
• 50 ps Maximum Output Skew
• 350 ps Maximum Part−to−part Skew
• 1.3 ns Maximum Propagation Delay
• Operating Range: VCC = 2.375 V to 3.630 V
• −40°C to +85°C Ambient Operating Temperature

应用 Application

• Telecom
• Ethernet
• Networking
• SONET
• Routers
• Switches

简介

NB3L8504S属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的NB3L8504S时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。