ISO-CMOS ST-BUS??FAMILY T1/CEPT Digital Trunk PLL

Description The MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT trans

文件：299.61 Kbytes 页数：16 Pages

MITEL

T1/CEPT Digital Trunk PLL

Description The MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT trans

文件：204.46 Kbytes 页数：16 Pages

MITEL

T1/CEPT Digital Trunk PLL

Description The MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT trans

文件：204.46 Kbytes 页数：16 Pages

MITEL

ISO-CMOS ST-BUS??FAMILY T1/CEPT Digital Trunk PLL

Description The MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT trans

文件：299.61 Kbytes 页数：16 Pages

MITEL

ISO-CMOS ST-BUS??FAMILY T1/CEPT Digital Trunk PLL

文件：132.77 Kbytes 页数：19 Pages

MITEL

ISO-CMOS ST-BUS??FAMILY T1/CEPT Digital Trunk PLL

文件：132.77 Kbytes 页数：19 Pages

MITEL

ISO-CMOS ST-BUS FAMILY T1/CEPT Digital Trunk PLL

Description\nThe MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT transmiss • Provides T1 clock at 1.544 MHz locked to input frame pulse\n• Sources CEPT (30+2) Digital Trunk/ST-BUS clock and timing signals locked to internal or external 8 kHz signal\n• TTL compatible logic inputs and outputs\n• Uncommitted 2-input NAND gate\n• Single 5 volt power supply\n• Low power ISO-CMO;

Mitel

ISO-CMOS ST-BUS⑩ FAMILY T1/CEPT Digital Trunk PLL

Mitel