MPC860PZQ66D4

PowerQUICC, 32 Bit Power Architecture SoC, 66MHz, CPM, ENET, ATM, HDLC, PCMCIA, 0 to 95C; Embedded MPC8xx Core with 88 MIPS at 66 MHz (using Dhrystone 2.1); MPC860P - 106 MIPS at 80 MHz for the MPC860P\n• 4Kb Instruction Cache; MPC860P - 16Kb Instruction Cache\n• 4Kb Data Cache; MPC860P - 8Kb Data Cache\n• 8Kb Dual Port RAM\n• Instruction and Data MMUs\n• Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits)\n• 32 Address Lines\n• Complete Static Design (040 MHz Operation)\n• Memory Controller (Eight Banks)\n• General-Purpose Timers\n• System Integration Unit (SIU)\n• Interrupts\n• Communications Processor Module (CPM)\n• Four Baud Rate Generators\n• Four SCCs (Serial Communication Controllers)\n• Two SMCs (Serial Management Channels)\n• One SPI (Serial Peripheral Interface)\n• One I2C (Inter-Integrated Circuit) Port\n• Time-Slot Assigner\n• Parallel Interface Port\n• PCMCIA Interface\n• Low Power Support\n• Debug Interface\n• 3.3 V Operation with 5V TTL Compatibility\n;

The MPC860 PowerQUICC® offers an integrated processor and peripheral solution that can be used in a variety of communications and networking controller applications.\nDelivers higher performance in all areas of device operation including flexibility, extensions in capability, and integration\nProvides lower power consumption than traditional architectures\nBacked by strong third-party tool support through Our Design Alliance Program\n

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MPC860PZQ66D4

PowerQUICC??Family Hardware Specifications

MPC860PZQ66D4

Hardware Specifications

MPC860PZQ66D4R2

Hardware Specifications

MPC860PZQ66D4R2

PowerQUICC??Family Hardware Specifications

KMPC860PZQ66D4

PowerQUICC??FamilyHardwareSpecifications

KMPC860PZQ66D4

HardwareSpecifications