MPC860DEVR80D4中文资料PowerQUICC, 32 Bit Power Architecture SoC, 80MHz, CPM, ENET, HDLC, PCMCIA, 0 to 95C数据手册恩XP规格书

描述 Description

The MPC860 PowerQUICC® offers an integrated processor and peripheral solution that can be used in a variety of communications and networking controller applications.
Delivers higher performance in all areas of device operation including flexibility, extensions in capability, and integration
Provides lower power consumption than traditional architectures
Backed by strong third-party tool support through Our Design Alliance Program

特性 Features

Embedded MPC8xx Core with 88 MIPS at 66 MHz (using Dhrystone 2.1); MPC860P - 106 MIPS at 80 MHz for the MPC860P
• 4Kb Data Cache; MPC860P - 8Kb Data Cache
• Instruction and Data MMUs
• 32 Address Lines
• Memory Controller (Eight Banks)
• System Integration Unit (SIU)
• Communications Processor Module (CPM)
• Four SCCs (Serial Communication Controllers)
• One SPI (Serial Peripheral Interface)
• Time-Slot Assigner
• PCMCIA Interface
• Debug Interface
• 3.3 V Operation with 5V TTL Compatibility

应用 Application

Secure Transaction and Retail Payments
•POS Printer