MM74C165N数据手册集成电路（IC）的移位寄存器规格书PDF

描述 Description

General Description
The MM74C165 functions as an 8-bit parallel-load, serial shift register. Data is loaded into the register independent of the state of the clock(s) when PARALLEL LOAD (PL) is low. Shifting is inhibited as long as PL is low. Data is sequentially shifted from complementary outputs, Q7 and Q7, highest-order bit (P7) first. New serial data may be entered via the SERIAL DATA (Ds) input. Serial shifting occurs on the rising edge of CLOCK1 or CLOCK2. Clock inputs may be used separately or together for combined clocking from independent sources. Either clock input may be used also as an active-low clock enable. To prevent double-clocking when a clock input is used as an enable, the enable must be changed to a high level (disabled) only while the clock is HIGH.

特性 Features

■ Wide supply voltage range: 3V to 15V
■ Guaranteed noise margin: 1V
■ High noise immunity: 0.45 VCC (typ.)
■ Low power TTL compatibility: fan out of 2 driving 74L
■ Parallel loading independent of clock
■ Dual clock inputs
■ Fully static operation

简介

MM74C165N属于集成电路（IC）的移位寄存器。由制造生产的MM74C165N移位寄存器移位寄存器是低级逻辑器件，通常用于在串行和并行方式之间转换数字逻辑信号形式的数据，或在数字字内移动数据位的位置。移位寄存器通常使用集成到一个设备中的一组触发器来实现，常用于集成度更高的逻辑器件，但仍可用于 I/O 扩展等应用，在这些应用中离散形式的函数可能会非常有用。