Dual D Flip-Flop

文件：120.27 Kbytes 页数：6 Pages

NSC

国半

Dual D Flip-Flop

文件：120.27 Kbytes 页数：6 Pages

NSC

国半

Dual D Flip-Flop

文件：120.27 Kbytes 页数：6 Pages

NSC

国半

Dual D Flip-Flop

General Description\nThe MM54C74/MM74C74 dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Each flipflop has independent data, preset, clear and clock inputs and Q and Q outputs. The logic level present at the data ■ Supply voltage range                                3V to 15V\n■ Tenth power TTL compatible   Drive 2 LPT2L loads\n■ High noise immunity                        0.45 VCC (typ.)\n■ Low power                                            50 nW (typ.)\n■ Medium speed operation                    10 MHz (;

TI

德州仪器