MK20DN128VLF5数据手册恩XP中文资料规格书

描述 Description

Includes a rich suite of analog, communication, timing and control peripherals to accommodate a wide range of requirements
Maximizes board space and enhances performance with minimum-length interconnections
Provides performance efficiency with industry-leading low power
Delivers significant BOM savings through smart on-chip integration
Shares the comprehensive enablement and scalability of the Kinetis® portfolio

特性 Features

Ultra-Low-Power
• 11 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents of <190 nA (VLLS0), run currents of <270 uA/MHz, 4 µs wake-up from Stop mode
• Full memory and analog operation down to 1.71 volts for extended battery life
• Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
• Low-power timer for continual system operation in reduced power state

应用 Application

Industrial
•Continuous Glucose Monitor
•Continuous Positive Airway Pressure (CPAP) Machine
•Digital Stethoscope
•Digital X-Ray