MK1726-08数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The MK1726-08 generates a low EMI output clock and a reference clock from a clock or crystal input. The part is designed to lower EMI through the application of spreading a clock. Using IDT' proprietary mix of analog and digital Phase-Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB depending on spread range. The MK1726-08 offers a range of down spread from a high speed clock or crystal input. The MK1726-08 generates one modulated (SSCLK) and unmodulated (REFCLK) clock and is compatible with Cypress CY25819. The modulated clock is controlled by the select pin, and the unmodulated clock has the same frequency as the input clock or crystal.

特性 Features

Packaged in 8-pin SOIC
Pb (lead) free package
Input frequency range 16- 32 MHz
Provides modulated and unmodulated clocks
Accepts a clock or crystal input
Provides down spread modulation
Provides power down function
Reduce electromagnetic interference (EMI) by 8-16 db
Operating voltage of 3.3 V
Advanced, low-power CMOS process