丝印：MK2049-34SI；Package：SOIC；3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL

Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Fixed I/O phase relationship on all selections • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8

文件：256.38 Kbytes 页数：10 Pages

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丝印：MK2049-34SI；Package：SOIC；3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL

Features • Packaged in 20-pin SOIC • 3.3 V + 5 operation • Fixed I/O phase relationship on all selections • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8

文件：256.38 Kbytes 页数：10 Pages

RENESAS

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3.3 Volt Communications Clock VCXO PLL

Description The MK2049-34A is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34A generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clo

文件：136.47 Kbytes 页数：8 Pages

ICST

3.3 Volt Communications Clock VCXO PLL

Description The MK2049-34A is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34A generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clo

文件：136.47 Kbytes 页数：8 Pages

ICST

3.3 V Communications Clock PLL

Description The MK2049-34 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34 generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks freq

文件：135.66 Kbytes 页数：11 Pages

ICST

3.3 V Communications Clock PLL

Description The MK2049-34 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34 generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies. This allows for the generation of clocks freq

文件：135.66 Kbytes 页数：11 Pages

ICST

3.3 Volt Communications Clock VCXO PLL

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3.3 V Communications Clock PLL

Renesas

瑞萨

Package：20-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC VCXO PLL CLK SYNTH 20-SOIC

Renesas Electronics America Inc

Package：20-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC VCXO PLL CLK SYNTH 20-SOIC

Renesas Electronics America Inc