MCIMX508CVK8B数据手册恩XP中文资料规格书

描述 Description

The i.MX508 processor is the first system-on-chip (SoC) designed specifically for eReaders that incorporates a high performance 800MHz Arm® Cortex®-A8 processor and an integrated hardware Electronic Paper Display (EPD) Controller certified by E Ink® to drive the latest and next generation Pearl™ panels. The i.MX508 enables reduced system cost, longer battery life and higher performance for faster page flips and a better reading experience.
The i.MX508 is supported by a companion NXP® power management IC, MMPF0100.

特性 Features

CPU Complex
• Up to 800 MHz Arm® Cortex®-A8
• 32 KB instruction and data caches
• Unified 256 KB L2 cache
• NEON™ SIMD media accelerator
• Vector floating point coprocessor
Multimedia
• OpenVG™ 1.1 hardware accelerator
• 32-bit primary display support up to SXGA+ resolution
• EPD Controller supporting up to 4096 x 4096
• Simultaneous EPD and LCD support
• Enhanced Pixel Processing Pipeline (PxP) supporting CSC, Combine, Rotate, Gamma Mapping
External Memory Interface
• Up to 2 GB LP-DDR2, DDR2 and LP-DDR1(mDDR), 16/32-bit
• SLC/MLC NAND flash, 8/16-bit with 32-bit ECC
Advanced Power Management
• Multiple independent power domains
• State Retention Power Gating (SRPG)
• Dynamic voltage and frequency scaling (DVFS)
Connectivity
• High-Speed USB 2.0 OTG with PHY
• High-Speed USB 2.0 Host with PHY
• 10/100 Ethernet controller
Controllers
• Wide array of serial interfaces, including SDIO, SPI, I2C and UART
• I2S audio interface
Product Longevity
• This product is included in NXP®.s product longevity program, with assured supply for a minimum of 10 years after launch

应用 Application

Secure Transaction and Retail Payments
•Kiosk (No Image Recognition)