MCIMX507CVM8B中文资料i.MX50 32-bit MPU, ARM Cortex-A8 core, 800MHz, MAPBGA 400数据手册恩XP规格书

描述 Description

Building on the market-leading i.MX508 applications processor for eReaders, the i.MX507 processor is the latest addition to Our Arm® Cortex®-A8 product portfolio. The i.MX507 brings the unique combination of the Cortex A8 and an integrated hardware Electronic Paper Display (EPD) controller to drive next generation low power display applications including outdoor signage and kiosks. Together with the companion NXP® power management ICs (PMIC)MC34708 and MMPF0100, customers can drive their next generation EPD designs with the i.MX507 processor.

特性 Features

CPU Complex
• Up to 800 MHz Arm® Cortex™-A8
• 32 KB instruction and data caches
• Unified 256 KB L2 cache
• NEON™ SIMD media accelerator
• Vector floating point coprocessor
Multimedia
• 32-bit primary display support up to SXGA+ resolution
• EPD Controller supporting up to 4096 x 4096 resolution
• Pixel Processing Pipeline (ePxP) supporting CSC, Combine, Rotate, Gamma Mapping
Simultaneous EPD and LCD support
• Pixel Processing Pipeline (PxP) supporting CSC, Combine, Rotate, Gamma Mapping
External Memory Interface
• Up to 2GB of LP-DDR2, DDR2 and LP-DDR1(mDDR), 16/32-bit
• SLC/MLC NAND flash, 8/16-bit with 32-bit ECC
Advanced Power Management
• Multiple independent power domains
• State Retention Power Gating (SRPG)
• Dynamic voltage and frequency scaling (DVFS)
Connectivity
• High-Speed USB 2.0 OTG with PHY
• High-Speed USB 2.0 Host with PHY
• 10/100 Ethernet controller
Controllers
• Wide array of serial interfaces, including SDIO, SPI, I2C and UART
• I2S audio interface
Product Longevity
• This product is included in NXP®.s product longevity program, with assured supply for a minimum of 10 years after launch

应用 Application

Secure Transaction and Retail Payments
•Kiosk (No Image Recognition)