Integrated Microprocessor

文件：5.73719 Mbytes 页数：484 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

UART MODULE

文件：53.72 Kbytes 页数：16 Pages

Motorola

摩托罗拉

Integrated Microprocessor User?셲 Manual

文件：5.73719 Mbytes 页数：484 Pages

Motorola

摩托罗拉

Integrated Microprocessor

文件：5.73719 Mbytes 页数：484 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

UART MODULE

文件：53.72 Kbytes 页数：16 Pages

Motorola

摩托罗拉

MCF5307 V3CORE 4KSRAM

The MCF5307 is a high-performance (70 MIPS), cost-effective, highly integrated microprocessor designed for embedded control applications. The MCF5307 combines a ColdFire® V3; processor core with a multiply-accumulate (MAC) module, DRAM controller, direct memory access (DMA) controller, timers and pa • ColdFire® V3 core delivering up to 75 (Dhrystone 2.1) MIPS @ 90 MHz\n• 4 KB SRAM\n• 8 KB unified cache\n• Integer/fractional MAC unit\n• Divide unit\n• System debug interface\n• DRAM controller\n• Dual 16-bit general-purpose multimode timers\n• System debug support\n• Package 208-pin plastic QFP\n;

恩XP

恩智浦

MCF530X 32-bit MPU, ColdFire V3 core, 66MHz, QFP 208

The MCF5307 is a high-performance (70 MIPS), cost-effective, highly integrated microprocessor designed for embedded control applications. The MCF5307 combines a ColdFire® V3; processor core with a multiply-accumulate (MAC) module, DRAM controller, direct memory access (DMA) controller, timers and pa • ColdFire® V3 core delivering up to 75 (Dhrystone 2.1) MIPS @ 90 MHz\n• 4 KB SRAM\n• 8 KB unified cache\n• Integer/fractional MAC unit\n• Divide unit\n• System debug interface\n• DRAM controller\n• Dual 16-bit general-purpose multimode timers\n• System debug support\n• Package 208-pin plastic QFP\n;

恩XP

恩智浦

MCF5307 V3CORE 4KSRAM

The MCF5307 is a high-performance (70 MIPS), cost-effective, highly integrated microprocessor designed for embedded control applications. The MCF5307 combines a ColdFire® V3; processor core with a multiply-accumulate (MAC) module, DRAM controller, direct memory access (DMA) controller, timers and pa • ColdFire® V3 core delivering up to 75 (Dhrystone 2.1) MIPS @ 90 MHz\n• 4 KB SRAM\n• 8 KB unified cache\n• Integer/fractional MAC unit\n• Divide unit\n• System debug interface\n• DRAM controller\n• Dual 16-bit general-purpose multimode timers\n• System debug support\n• Package 208-pin plastic QFP\n;

恩XP

恩智浦