Presettable 4-Bit Down Counters

Presettable 4−Bit Down Counters The MC14526B binary counter is constructed with MOS P−channel and N−channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded “0” state output for divide−by−N applications. In single

文件：208.2 Kbytes 页数：12 Pages

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Presettable 4-Bit Down Counters

Presettable 4−Bit Down Counters The MC14526B binary counter is constructed with MOS P−channel and N−channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded “0” state output for divide−by−N applications. In single

文件：156.46 Kbytes 页数：10 Pages

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Presettable 4-Bit Down Counters

Presettable 4−Bit Down Counters The MC14526B binary counter is constructed with MOS P−channel and N−channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded “0” state output for divide−by−N applications. In single

文件：208.2 Kbytes 页数：12 Pages

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安森美半导体

Presettable 4-Bit Down Counters

文件：125.42 Kbytes 页数：9 Pages

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Presettable 4?묪it Down Counters

文件：121.34 Kbytes 页数：10 Pages

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Presettable 4?묪it Down Counters

文件：121.34 Kbytes 页数：10 Pages

ONSEMI

安森美半导体

Presettable 4-Bit Down Counters

文件：125.42 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Presettable 4-Bit Down Counters

文件：125.42 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Presettable 4-Bit Down Counters

文件：125.42 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Presettable 4-Bit Down Counters

The MC14526B binary counter is constructed with MOS P-channel and N-channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded \"0\" state output for divide-by-N applications. In single stage applications the \"0\" outp • Supply Voltage Range = 3.0 Vdc to 18 Vdc\n• Logic Edge-Clocked Design - Incremented on Positive Transition of Clock or Negative Transition of Inhibit\n• Asynchronous Preset Enable\n• Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range\n• P;

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