MC100EP52

3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop

Description TheMC10EP/100EP52isadifferentialdata,differentialclockDflip−flop.ThedeviceispinandfunctionallyequivalenttotheEL52device. Dataentersthemasterportionoftheflip−flopwhentheclockisLOWandistransferredtotheslave,andthustheoutputs,uponapositivetr

MC100EP52

ECL 差分时钟/数据 D 类触发器; • 330ps Typical Propagation Delay\n• Maximum Frequency > 4 GHz Typical\n• PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V\n• NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V\n• Open Input Default State\n• Safety Clamp on Inputs\n• Q Output will default LOW with inputs open or at VEE\n• Pb-Free Packages are Available\n;

The MC10EP/100EP52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the EL52 device. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EP52 allow the device to also be used as a negative edge triggered device. The EP52 employs input clamping circuitry so that under open input conditions (pulled down to VEE ) the outputs of the device will remain stable.

MC100EP52

3.3V / 5V ECL Differential Data and Clock D Flip?묯lop

MC100EP52D

3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop

Description TheMC10EP/100EP52isadifferentialdata,differentialclockDflip−flop.ThedeviceispinandfunctionallyequivalenttotheEL52device. Dataentersthemasterportionoftheflip−flopwhentheclockisLOWandistransferredtotheslave,andthustheoutputs,uponapositivetr

MC100EP52DR2

3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop

Description TheMC10EP/100EP52isadifferentialdata,differentialclockDflip−flop.ThedeviceispinandfunctionallyequivalenttotheEL52device. Dataentersthemasterportionoftheflip−flopwhentheclockisLOWandistransferredtotheslave,andthustheoutputs,uponapositivetr

MC100EP52DT

3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop

Description TheMC10EP/100EP52isadifferentialdata,differentialclockDflip−flop.ThedeviceispinandfunctionallyequivalenttotheEL52device. Dataentersthemasterportionoftheflip−flopwhentheclockisLOWandistransferredtotheslave,andthustheoutputs,uponapositivetr

MC100EP52DTR2

3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop

Description TheMC10EP/100EP52isadifferentialdata,differentialclockDflip−flop.ThedeviceispinandfunctionallyequivalenttotheEL52device. Dataentersthemasterportionoftheflip−flopwhentheclockisLOWandistransferredtotheslave,andthustheoutputs,uponapositivetr

MC100EP52D

3.3V / 5V ECL Differential Data and Clock D Flip?묯lop

MC100EP52D

Evaluation Board Manual for High Frequency SOIC 8

MC100EP52DG

3.3V / 5V ECL Differential Data and Clock D Flip?묯lop