MAX3627集成电路（IC）的应用特定时钟/定时规格书PDF中文资料

General Description

The MAX3627 is a low-jitter, precision clock generator optimized for network applications. The device integrates a crystal oscillator and a phase-locked loop (PLL) to generate high-frequency clock outputs for Ethernet applications.

Maxim’s proprietary PLL design features ultra-low jitter (0.4psRMS) and excellent power-supply noise rejection (PSNR), minimizing design risk for network equipment.

The MAX3627 contains seven LVDS outputs and one LVCMOS output. The output frequencies are selectable among 125MHz, 156.25MHz, and 312.5MHz.

特性 Features

♦ Crystal Oscillator Interface: 25MHz

♦ OSC_IN Interface

   PLL Enabled: 25MHz

   PLL Disabled: 20MHz to 320MHz

♦ Outputs

   One LVDS Output at 125MHz/156.25MHz/

      312.5MHz (Selectable with FSELA)

   Six LVDS Outputs at 125MHz/156.25MHz/

      312.5MHz (Selectable with FSELB)

   One LVCMOS Output at 125MHz/156.25MHz

      (Selectable with FSELB)

♦ Low Phase Jitter

   0.4psRMS (12kHz to 20MHz)

   0.2psRMS (1.875MHz to 20MHz)

♦ Excellent PSNR: -64dBc at 156.25MHz with

   40mVP-P Supply Noise at 100kHz

♦ Operating Temperature Range: 0°C to +70°C

Applications

   Ethernet Networking Equipment