QUAD BUS BUFFERS 3-STATE

DESCRIPTION The M54/74HCT125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. ■ HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C ■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS ■ BALANCED P

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QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M74HCT125 is an high speed CMOS QUAD BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V

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QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes 页数：9 Pages

STMICROELECTRONICS

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QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M74HCT125 is an high speed CMOS QUAD BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V

文件：178.9 Kbytes 页数：9 Pages

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QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes 页数：9 Pages

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Quad 3-State Noninverting Buffer with LSTTL Compatible Inputs

The MC74HCT125A is identical in pinout to the LS125. The device inputs are compatible with standard CMOS and LSTTL outputs. The MC74HCT125A noninverting buffer is designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems. The devices have four separate

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