M74HC280数据手册集成电路（IC）的奇偶校验发生器校验器规格书PDF

描述 Description

The M74HC280 is a high-speed CMOS 9-bit parity generator fabricated with silicon gate C2MOS technology.

It is composed of nine data inputs (A to I) and odd/even parity outputs (ΣODD and ΣEVEN). The nine data inputs control the output conditions. When the number of high-level inputs is odd, ΣODD outputs are kept high and ΣEVEN outputs are kept low. Conversely, when the number of high-level outputs is even, ΣEVEN outputs are kept high and ΣODD outputs are kept low. The IC generates either odd or even parity making the application flexible. The word-length capability is easily expanded by cascading.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

特性 Features

• High-speed: tPD = 22 ns (typ.) at VCC = 6 V
• Low power dissipation: ICC = 4 μA (max.) at TA = 25 °C
• High noise immunity: VNIH = VNIH = 28 % VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min.)
• Balanced propagation delays: tPLH ≅ tPHL
• Wide operating voltage range: VCC (opr) = 2 V to 6 V
• Pin and function compatible with 74 series 280
• ESD performance
•HBM: 2 kV
•MM: 200 V
•CDM: 1 kV

简介

M74HC280属于集成电路（IC）的奇偶校验发生器校验器。由制造生产的M74HC280奇偶校验发生器和校验器逻辑奇偶校验发生器和校验器系列器件是元件级器件，用于评估设置为 1 的数字字中的位数，并另外生成（或评估）一个奇偶校验位，指示设置为 1 的字中的位数是偶数还是奇数。此功能通常用作检测在传输过程中可能引入的数据错误的简单方法。