M74HC259数据手册集成电路（IC）的锁存器规格书PDF

描述 Description

The M74HC259 is a high-speed CMOS 8-bit addressable latch manufactured with silicon gate C2MOS technology.

The M74HC259 has single data input (D) 8 latch outputs (Q0-Q7), 3 address inputs (A, B, and C), common enable input (E), and a common CLEAR input. To operate this device as an addressable latch, data is held on the D input, and the address of the latch into which the data is to be entered is held on the A, B, and C inputs. When ENABLE is taken low, the data flows through to the address outputs. The data is stored on the positive-going edge of the ENABLE pulse. All unaddressed latches will remain unaffected. With ENABLE in the high state, the device is deselected and all latches remain in their previous state, unaffected by changes on the data or address inputs. To eliminate the possibility of entering erroneous data into the latches, the ENABLE should be held high (inactive) while the address lines are changing. If ENABLE is held high and is taken low, all eight latches are cleared to the low state. If ENABLE is low, all latches except the addressed latch will be cleared. The addressed latch will instead follow the D input, effectively implementing a 3-to-8 line decoder.

All inputs are equipped with protection circuits to guard against static discharge and transient excess voltage.

特性 Features

• High speed: tPD = 20 ns (typ.) at VCC = 6 V
• Low power dissipation: ICC = 4 µA (max.) at TA = 25 °C
• High noise immunity: VNIH = VNIL = 28 % VCC (min.)
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced propagation delays: tPLH ~= tPHL
• Wide operating voltage range: VCC (OPR) = 2 V to 6 V
• Pin and function compatible with 74 series 259
• ESD performance
•CDM: 1 kV
•HBM: 1.5 kV
•MM: 200 V

简介

M74HC259属于集成电路（IC）的锁存器。由制造生产的M74HC259锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。