SUMMARY DESCRIPTION

The M36W0R6040T0 and M36W0R6040B0 are Multiple Memory Products which combine two memory devices; a 64-Mbit, Multiple Bank Flash memories, the M58WR064FT/B, and a 16-Mbit Pseudo SRAM, the M69AR024B. Recommended operating conditions do not allow more than one memory to be active at the same time. The memory is offered in a Stacked TFBGA88 (8x10mm, 8x10 ball array, 0.8mm pitch) package.

In addition to the standard version, the packages are also available in Lead-free version, in compliance with JEDEC Std J-STD-020B, the ST ECO PACK 7191395 Specification, and the RoHS (Restriction of Hazardous Substances) directive.

All packages are compliant with Lead-free soldering processes.

FEATURES SUMMARY

■ MULTI-CHIP PACKAGE

– 1 die of 64 Mbit (4Mb x 16) Flash Memory

– 1 die of 16 Mbit (1Mb x 16) Pseudo SRAM

■ SUPPLY VOLTAGE

– VDDF = VDDP = VDDQ = 1.7V to 1.95V

■ LOW POWER CONSUMPTION

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Device Code (Top Flash Configuration), M36W0R6040T0: 8810h

– Device Code (Bottom Flash Configuration), M36W0R6040B0: 8811h

■ PACKAGES

– Compliant with Lead-Free Soldering Processes

– Lead-Free Versions

FLASH MEMORY

■ PROGRAMMING TIME

– 8µs by Word typical for Fast Factory Program

– Double/Quadruple Word Program option

– Enhanced Factory Program options

■ MEMORY BLOCKS

– Multiple Bank Memory Array: 4 Mbit Banks

– Parameter Blocks (Top location)

■ SYNCHRONOUS / ASYNCHRONOUS READ

– Synchronous Burst Read mode: 66MHz

– Asynchronous/ Synchronous Page Read mode

– Random Access: 70ns

■ DUAL OPERATIONS

– Program Erase in one Bank while Read in others

– No delay between Read and Write operations

■ BLOCK LOCKING

– All blocks locked at Power-up

– Any combination of blocks can be locked

– WPF for Block Lock-Down

■ SECURITY

– 128-bit user programmable OTP cells

– 64-bit unique device number

■ COMMON FLASH INTERFACE (CFI)

■ 100,000 PROGRAM/ERASE CYCLES per BLOCK

PSRAM

■ ACCESS TIME: 70ns

■ LOW STANDBY CURRENT: 110µA

■ DEEP POWER DOWN CURRENT: 10µA