M24128-DRE数据手册ST中文资料规格书

描述 Description

The M24128-DRE is a 128-Kbit serial EEPROM device operating up to 105 °C. The M24128-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.

The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.

The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24128-DRE is a byte-alterable memory (16 K × 8 bits) organized as 256 pages of 64 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.

The M24128-DRE offers an additional Identification Page (64 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

特性 Features

• Compatible with all I2C bus modes
•1 MHz
•400 kHz
•100 kHz
• Memory array
•128 Kbits (16 Kbytes) of EEPROM
•Page size: 64 bytes
•Additional Write lockable page (Identification page)
• Extended temperature and voltage range
•-40 °C to 105 °C; 1.7 V to 5.5 V
• Schmitt trigger inputs for noise filtering
• Short Write cycle time
•Byte Write within 4 ms
•Page Write within 4 ms
• Write cycle endurance
•4 million Write cycles at 25 °C
•1.2 million Write cycles at 85 °C
•900 k Write cycles at 105 °C
• Data retention
•more than 50 years at 105 °C
•200 years at 55 °C
• ESD Protection (Human Body Model)
•4000 V
• Packages
•RoHS compliant and halogen-free (ECOPACK2®)