M2006-12A-622.0800数据手册Renesas中文资料规格书

描述 Description

GENERAL DESCRIPTION
The M2006-12A is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock frequency translation and jitter attenuation. Clock multiplication ratios (including forward and inverse FEC) are pin-selected from pre-programming look-up tables. Includes Hitless Switching and Phase Build-out to enable SONET (GR-253) / SDH (G.813) MTIE and TDEV compliance during reference clock reselection. Hitless Switching (HS) engages when a 4ns or greater clock phase change is detected.FEATURES
◆ Reduced intrinsic output jitter and improved power supply noise rejection compared to M2006-12
◆ Similar to the M2006-02A - and pin-compatible - but adds Hitless Switching and Phase Build-out functions
◆ Includes APC pin for Phase Build-out function (for absorption of the input phase change)
◆ Pin-selectable PLL divider ratios support forward and inverse FEC ratio translation
◆ Input reference and VCSO frequencies up to 700MHz
   (Specify VCSO frequency at time of order)
◆ Low phase jitter of 0.25 ps rms typical
   (12kHz to 20MHz or 50kHz to 80MHz)
◆ Commercial and Industrial temperature grades
◆ Single 3.3V power supply
◆ Small 9 x 9 mm SMT (surface mount) package

特性 Features

◆ Reduced intrinsic output jitter and improved power supply noise rejection compared to M2006-12
◆ Similar to the M2006-02A - and pin-compatible - but adds Hitless Switching and Phase Build-out functions
◆ Includes APC pin for Phase Build-out function (for absorption of the input phase change)
◆ Pin-selectable PLL divider ratios support forward and inverse FEC ratio translation
◆ Input reference and VCSO frequencies up to 700MHz
   (Specify VCSO frequency at time of order)
◆ Low phase jitter of 0.25 ps rms typical
   (12kHz to 20MHz or 50kHz to 80MHz)
◆ Commercial and Industrial temperature grades
◆ Single 3.3V power supply
◆ Small 9 x 9 mm SMT (surface mount) package