丝印：LV010ATM；Package：SOIC；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

文件：588.7 Kbytes 页数：20 Pages

TI2

德州仪器

丝印：LV010ATM；Package：SOIC；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

文件：588.7 Kbytes 页数：20 Pages

TI2

德州仪器

丝印：LV010ATM；Package：SOIC；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

文件：588.7 Kbytes 页数：20 Pages

TI2

德州仪器