LPC3220FET296中文资料Arm926EJ-S™，带128 kB SRAM、高速USB OTG、SD/MMC以及NAND闪存控制器数据手册恩XP规格书

描述 Description

The LPC3220 operates at CPU frequencies of up to 266 MHz. The NXP® implementation uses an ARM926EJ-S CPU core with a Harvard architectur, 5-stage pipeline, and an integral Memory Management Unit (MMU).The LPC3220 also includes 128 kB of on-chip static RAM, a NAND flash interface, and an external bus interface that supports SDR and DDR SDRAM, as well as static devices. In addition, the LPC3220 includes a USB 2.0 full-speed interface, seven UARTs, two I2C-bus interfaces, two SPI/SSP ports, two I2S-bus interfaces, two single output PWMs, a motor control PWM, six general purpose timers with capture inputs and compare outputs, a Secure Digital (SD) interface, and a 10-bit Analog-to-Digital Converter (ADC) with a touch screen sense option.

特性 Features

• ARM926EJS processor, running at CPU clock speeds up to 266 MHz
• Vector Floating Point (VFP) coprocessor
• 32 kB instruction cache and a 32 kB data cache
• Up to 128 kB of Internal SRAM (IRAM)
• Selectable boot-up from various external devices
• Multi-layer AHB system that provides a separate bus for each AHB master
• External memory controller for DDR and SDR SDRAM as well as for static devices
• Two NAND flash controllers
• Master Interrupt Controller (MIC) and two Slave Interrupt Controllers (SIC)
• Eight channel General Purpose DMA (GPDMA) controller on the AHB
• USB interface supporting either device, host (OHCI compliant), or On-The-Go
• Four standard UARTs with fractional baud rate generation
• Three additional high-speed UARTs intended for on-board communications
• Two SPI controllers
• Two SSP controllers
• Two I2C-bus interfaces with standard open-drain pins
• Two I2S-bus interfaces, each with separate input and output channels
• Secure Digital (SD) memory card interface
• General Purpose (GP) input, output, and I/O pins
• 10 bit, 400 kHz Analog-to-Digital Converter (ADC)
• Real-Time Clock (RTC) with separate power pin and dedicated 32 kHz oscillator
• 32-bit general purpose high-speed timer with a 16-bit pre-scaler
• Six enhanced timer/counters
• 32-bit millisecond timer driven from the RTC clock
• WatchDog timer clocked by the peripheral clock
• Two single-output PWM blocks
• Motor control PWM
• Keyboard scanner function allows automatic scanning of an up to 8 x 8 key matrix
• Up to 18 external interrupts
• Standard Arm® test/debug interface for compatibility with existing tools
• Emulation Trace Buffer (ETB) with 2048 x 24 bit RAM allows trace via JTAG
• Stop mode saves power
• On-chip crystal oscillator
• An on-chip PLL allows CPU operation up to the maximum CPU rate
• Boundary scan for simplified board testing

应用 Application

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网络控制