LPC2925FBD100数据手册恩XP中文资料规格书

描述 Description

The LPC2921/2923/2925 combine an ARM968E-S CPU core with two integrated TCM blocks operating at frequencies of up to 125 MHz, Full-speed USB 2.0 device controller, CAN and LIN, up to 40 kB SRAM, up to 512 kB flash memory, two 10-bit ADCs, and multiple serial and parallel interfaces in a single chip targeted at consumer, industrial, and communication markets. To optimize system power consumption, the LPC2921/2923/2925 has a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling.

特性 Features

Main Features
• ARM968E-S processor running at frequencies of up to 125 MHz maximum.
• Multi-layer AHB system bus at 125 MHz with three separate layers.
• Dual-master, eight-channel GPDMA controller on the AHB multilayer matrix whICh can be used with the Serial Peripheral Interface (SPI) interfaces and the UARTs, as well as for memory-to-memory transfers including the TCM memories.
• Up to 60 general-purpose I/O pins with programmable pull-up, pull-down, or bus keeper.
• Vectored Interrupt Controller (VIC) with 16 priority levels.
• Up to 16 level-sensitive external interrupt pins, including USB, CAN and LIN wake-up features.
• Configurable clock-out pin for driving external system clocks.
• Processor wake-up from power-down via external interrupt pins; CAN or LIN activity.
• Flexible Reset Generator Unit (RGU) able to control resets of individual modules.

• Second CGU (CGU1) with its own PLL generates a configurable clock output.
• Standard Arm® test and debug interface with real-time in-circuit emulator.
• Boundary-scan test supported.
• ETM/ETB debug functions with 8 kB of dedicated SRAM also accessible for application code and data storage.

• 144-pin LQFP package.
• -40 °C to +85 °C ambient operating temperature range.