LPC2292FBD144中文资料16/32位Arm®微控制器；256 kB ISP/IAP闪存，带CAN、10位ADC和外部存储器接口数据手册恩XP规格书

描述 Description

The LPC2292/2294 microcontrollers are based on a 16/32-bit Arm7TDMI-S™ CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty.
With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications.
Remark:Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.

特性 Features

Key features brought by LPC2292/2294/01 devices
• Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device. They also allow for a port pin to be read at any time regardless of its function.
• Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are 5 V tolerant when configured for digital I/O function(s).
• UART0/1 include fractional baud rate generator, auto-bauding capabilities and handshake flow-control fully implemented in hardware.
• Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
• SPI programmable data length and master mode enhancement.
• Diversified Code Read Protection (CRP) enables different security levels to be implemented. This feature is available in LPC2292/2294/00 devices as well.
• General purpose timers can operate as external event counters.
Key features common for all devices
• 16/32-bit Arm7TDMI-S™ microcontroller in a LQFP144 package.
• 16 kB on-chip static RAM and 256 kB on-chip flash program memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation.
• In-System Programming/In-Application Programming (ISP/IAP) via on-chip bootloader software. Single flash sector or full chip erase in 400 ms and programming of 256 B in 1 ms.
• EmbeddedICE-RT and Embedded Trace interfaces offer real-time debugging with the on-chip RealMonitor software as well as high-speed real-time tracing of instruction execution.
• Two/four (LPC2292/2294) interconnected CAN interfaces with advanced acceptance filters. Additional serial interfaces include two UARTs (16C550), Fast I²C-bus (400 kbit/s) and two SPIs.
• Eight channel 10-bit ADC with conversion time as low as 2.44 µs.
• Two 32-bit timers (with four capture and four compare channels), PWM unit (six outputs), Real-Time Clock (RTC), and watchdog.
• Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses.
• Configurable external memory interface with up to four banks, each up to 16 MB and 8/16/32-bit data width.
• Up to 112 general purpose I/O pins (5 V tolerant). Up to nine edge/level sensitive external interrupt pins available.
• 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 µs.
• The on-chip crystal oscillator should have an operating range of 1 MHz to 25 MHz.
• Power saving modes include Idle and Power-down.
• Processor wake-up from Power-down mode via external interrupt.
• Individual enable/disable of peripheral functions for power optimization.
• Dual power supply:
• CPU operating voltage range of 1.65 V to 1.95 V (1.8 V ± 0.15 V).
• I/O power supply range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads.