128K X 8 BIT CMOS SRAM

General Description The LP621024D is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus str

文件：183.97 Kbytes 页数：16 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus str

文件：183.97 Kbytes 页数：16 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus st

文件：192.22 Kbytes 页数：17 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D-T is a low operating current 1,048,576- bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus struc

文件：184.5 Kbytes 页数：16 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus str

文件：183.97 Kbytes 页数：16 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus st

文件：192.22 Kbytes 页数：17 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D-T is a low operating current 1,048,576- bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus struc

文件：184.5 Kbytes 页数：16 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus st

文件：192.22 Kbytes 页数：17 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus str

文件：183.97 Kbytes 页数：16 Pages

AMICC

联笙电子

128K X 8 BIT CMOS SRAM

General Description The LP621024D-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus st

文件：192.22 Kbytes 页数：17 Pages

AMICC

联笙电子