KM718V887中文资料三星数据手册PDF规格书

GENERAL DESCRIPTION

The KM718V887 is a 4,718,592 bit Synchronous Static Random Access Memory designed for support zero wait state performance for advanced Pentium/Power PC address pipelining. And with CS1 high, ADSP is blocked to control signal.

FEATURES

• Synchronous Operation.

• On-Chip Address Counter.

• Write Self-Timed Cycle.

• On-Chip Address and Control Registers.

• VDD= 3.3V+0.3V/-0.165V Power Supply.

• VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.

• 5V Tolerant Inputs except I/O Pins.

• Byte Writable Function.

• Global Write Enable Controls a full bus-width write.

• Power Down State via ZZ Signal.

• Asynchronous Output Enable Control.

• ADSP, ADSC, ADV Burst Control Pins.

• LBO Pin allows a choice of either a interleaved burst or a linear burst.

• Three Chip Enables for simple depth expansion with No Data Contention.

• TTL-Level Three-State Output.

• 100-TQFP-1420A