K4E171612D中文资料三星数据手册PDF规格书

DESCRIPTION

This is a family of 1,048,576 x 16 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-45, -50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.

FEATURES

• Part Identification

- K4E171611D-J(T) (5V, 4K Ref.)

- K4E151611D-J(T) (5V, 1K Ref.)

- K4E171612D-J(T) (3.3V, 4K Ref.)

- K4E151612D-J(T) (3.3V, 1K Ref.)

• Extended Data Out Mode operation

(Fast Page Mode with Extended Data Out)

• 2 CAS Byte/Word Read/Write operation

• CAS-before-RAS refresh capability

• RAS-only and Hidden refresh capability

• Self-refresh capability (L-ver only)

• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

• Available in plastic SOJ 400mil and TSOP(II) packages

• Single +5V±10 power supply (5V product)

• Single +3.3V±0.3V power supply (3.3V product)