IWRL6432W数据手册TI中文资料规格书

描述 Description

The IWRL6432W mmWave Sensor device is an integrated single chip mmWave sensor based on FMCW radar technology. The device is capable of operation in the 57GHz to 63.9GHz band and is partitioned into mainly four power domains: RF/Analog Sub-System: This block includes all the RF and Analog components required to transmit and receive the RF signals. Front-End Controller sub-System (FECSS): FECSS contains processor responsible for radar front-end configuration, control, and calibration. Application Sub-System (APPSS): APPSS is where the device implements a user programmable ARM Cortex M4 allowing for custom control and automotive interface applications. Top Sub-System (TOPSS) is part of the APPSS power domain and contains the clocking and power management sub-blocks. Hardware Accelerator (HWA): The HWA block supplements the APPSS by offloading common radar processing such as FFT, Constant False Alarm rate (CFAR), scaling, and compression.

The IWRL6432W is specifically designed to have separate control for each of the above-mentioned power domains to control the states (power ON or OFF) based on use case requirements. The device also features the capability to exercise various low-power states like sleep and deep sleep, where low-power sleep mode is achieved by clock gating and by turning off the internal IP blocks of the device. The device also provides the option of keeping some contents of the device, like Application image or RF profile retained in such scenarios.

Additionally, the device is built with TI’s low power 45nm RF CMOS process and enables unprecedented levels of integration in an extremely small form factor. IWRL6432W is designed for low power, ultra-accurate radar systems in the industrial (and personal electronics) space for applications such as building/factory automation, commercial/residential security, personal electronics, presence/motion detection, and gesture detection/recognition for human machine interfaces

特性 Features

FMCW Transceiver

Integrated PLL, transmitter, receiver, baseband and ADC

57GHz - 64GHz coverage with 7GHz continuous bandwidth

3 receive channels and 2 transmit channels

Range typically up to 25m

10dBm typical output power per Tx

12dB Typical noise figure

-89dBc/Hz typical phase noise at 1MHz

FMCW operation

5MHz IF bandwidth, real-only Rx channels

Ultra-accurate chirp engine based on fractional-N PLL

Per transmitter binary phase shifter



Processing elements

Arm M4F core with single precision FPU (160MHz)

TI Radar Hardware Accelerator (HWA 1.2) for FFT, log magnitude, and CFAR operations (80MHz)



Supports multiple low-power modes

Idle mode and deep sleep mode



Power management

1.8V and 3.3V IO support

Built-in LDO network for enhanced PSRR

BOM-Optimized and Power-Optimized modes

One or two power rails for 1.8V IO mode, two or three power rails for 3.3V IO mode





Built-in calibration

Built-in Firmware (ROM)

Self-Contained on chip calibration system



Host Interface

UART

CAN-FD

SPI



RDIF (Radar Data Interface) for raw ADC sample capture

Other interfaces available to user application

QSPI

I2C

JTAG

GPIOs

PWM Interface



Internal memory

1MB of On-Chip RAM

Configurable L3 shared memory for Radar Cube

Data and Code RAM of (512/640/768KB)



WCSP package having 11 x 11 BGA grid, 111 BGA balls; Package size: 4.89mm x 4.5mm



Clock source

40.0MHz crystal for primary clock

Supports externally driven clock (Square/Sine) at 40.0MHz

32kHz internal oscillator for low power operations



Supports temperature operating range

Operating junction temperature range: –40°C to 105°C