IP1103A数据手册IC+中文资料规格书

描述 Description

IP1103A is an integrated chip for a 10M/100M/1000M MC and PHY, a 100M/1000M SERDES for switch mode. IP1103A also supports low latency data transfer between TP and fiber media conversion in converter mode. The transceivers in IP1103A are designed in DSP approach with advanced 85-nm technology; this results in high noise immunity and robust performance. 

IP1103A embeds a 384kbit SRAM from the use of packet buffer. It also provides various 2-wire interfaces, such as CPU interface, SMI, and EEPROM data. The LED indicator can show the LED display for Link, Speed, Activity and various status by using 74LV164 or IP403 through 2-wire (LEDCLK, LEDDAT) signals driving from IP1103A for 6 bits LED display in serial LED mode. IP1103A also supports direct LED, Bi-color mode, and so on, for LED display needs. 

There are 1024 entries in the Lookup table. Hashing method can be selected either direct or CRC hashing for MAC address learning. Lookup Table aging time can be adjustable ranging from 55 seconds to 500 hours. IP1103A also provides the MAC learning threshold to limit the number of addresses learning. 

IP1103A has 16 entries for 802.1Q VLAN, which provides more security for VLAN member, and supports Independent VLAN Learning (IVL) and Share VLAN Learning (SVL). Further, IP1103A also has add/remove C-tag, S-tag, VLAN remarking, uplink link port and inactive VID redirect functions for the flexible VLAN application. Besides, IP1103A also supports VLAN translation function.

IP1103A has 32 entries for ACL table. The ACL (Address Control List) function provides advance and flexible control mechanism to decide what packet should do (action) if packet matches ACL rule. ACL Rule and action:

Rules: (Port ID, DA, SA, DA/SA, DIP, SIP, TCP/UDP Port Number (DP and SP) 
Actions: (Sniffer, Insert/remove Tag, Priority, Redirection, BW limited, DSCP, Drop, PTP, MIB Counter) 

For the Quality of Service application, IP1103A supports port-based, 802.1Q tag based, ACL based, IP CoS/DSCP based, SMAC based, IP address based, WAN/LAN based to decide the priority of output frame. For the Remarking application, IP1103A supports remarking for the DSCP, Ctag, and Stag value of transmit packet. 

For the meeting the various network applications, IP1103A also supports storm control, bandwidth rate control, Output Queues functions, Sniffer, PTP, MIB counters and various LED display modes. Therefore, IP1103A has the best adaptability and capability for the future network conditions. 

IP1103A also provides IRMP (IC+ remote management protocol) to let the users remotely configure the registers of IP1103A. 

For avoiding loop occur, loop detection mechanism is supported. In AZ mode, loop detection packet can still be sent.

特性 Features

• Switch mode
• A 1000Base-T/100Base-TX/10Base-Te and 1000Base-X/100Base-FX Fiber Ethernet Switch
• Built-in a 1000Base-T/100Base-TX/10Base-Te PHY
• Built-in a Serdes PHY
• IEEE802.3az support
• 10/100Mb full/half duplex support
• 1000Mb full duplex support

• Converter mode
• A 1000Base-T/100Base-TX/10Base-Te to 1000Base-X/100Base-FX Fiber Ethernet Converter
• Built-in a 1000Base-T/100Base-TX/10Base-Te PHY
• Built-in a Serdes PHY
• 10/100Mb full/half duplex support
• 1000Mb full duplex support
• Direct wire Architecture
• Low latency for TP and Fiber conversion
• Auto switching 

• Fiber MAU for SD signal
• TTL level for SD detection

• Store & Foward, Share Memory Non-blockingArchitecture
• Built-in 384Kb SRAM for packet buffer
• 16K Jumbo packet support

• Wire-speed Operation On Every Port
• Head of Line Blocking Prevention
• Flow Control Support
• 802.3x compliant flow control in full duplex
• Collision/Carrier_sense based backpressure in half duplex

• Internal 1K MAC Address Entities
• CRC/direct hashing algorithm
• Wire-speed address learning and resolution
• Security and static MAC support
• Learning enable/disable

• Sniffer Function Support (in/out/in+out)
• VLAN
• 2 Port based
• 4 Protocol based
• 16 Tagged based
• Tag remove/add/modify support
• IVL/SVL learning mode
• Protected VLAN support
• Q-in-Q (double tag) support
• VLAN translation

• Class Of Service (CoS) Support
• Port based

• Port Security
• MAC based
• IP based
• Port based

• Bandwidth Control
• 64K bps to wire speed (resolution 64k)
• Queue based bandwidth control (resolution 64k/1M/2M/4M)

• Support SMI Interface Auto-polling
• Speed, Duplex, Flow control, Link
• MMD access support

• Out Queue
• Frame buffer/queue/port based aging
• Bandwidth assured/limited
• Latency assured
• WRED
• Low latency queue support
• Dorm mode (WAN/LAN dual schedule mode)

• Support 16 ACL Entities Based On
• Ingress port
• VLAN
• Destination/Source MAC address
• Destination/Source IP (specific or range)
• TCP/UDP Destination/Source port number (specific or range)
• IP protocol, DSCP, TCP flag
• Action: drop, priority, Q-in-Q tag, remarking, redirect, bandwidth limited

• Configuration
• Pin initial setting
• 2-wire SMI interface for auto polling PHY
• 2-wire serial interface for configuration EEPROM
• Advanced EEPROM program mode

• LED
• LED display configuration selectable
• Serial LED, Direct LED, Bii-color LED support
• General LED indication for General mode full/half, 10/100/1000 LP and LFPT ...etc

• Support Auto Test Function for Mass-production
• Auto generate test frames
• Shown the result on LED output

• Interrupt Pin For PHY Mode/Link/SMI R/W
• Complete notification

• OAM support (IEEE 802.3ah and TS-1000)
• Remote fault indication
• Remote Loopback
• Auto discovery
• Remote R/W register