IN74ACT109

DUAL J-K FLIP-FLOP WITH SET AND RESET

DUALJ-KFLIP-FLOPWITHSETANDRESET High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IN74ACT109

Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IN74ACT109

DUAL J-K FLIP-FLOP WITH SET AND RESET;

DUAL J-K FLIP-FLOP WITH SET AND RESET\nHigh-Speed Silicon-Gate CMOSThe IN74ACT109 is identical in pinout to the LS/ALS109, HC/HCT109. The IN74ACT109 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.\nThis device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock. Both Q to Q outputs are available from each flip-flop.• TTL/NMOS Compatible Input Levels\n• Outputs Directly Interface to CMOS, NMOS, and TTL\n• Operating Voltage Range: 4.5 to 5.5 V\n• Low Input Current: 1.0 µA; 0.1 µA @ 25°C\n• Outputs Source/Sink 24 mA

IN74ACT109D

Dual J-K Flip-Flop with Set and Reset;

Dual J-K Flip-Flop with Set and Reset\nHigh-Speed Silicon-Gate CMOSThe IN74ACT109 is identical in pinout to the LS/ALS109, HC/HCT109. The IN74ACT109 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.\nThis device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock. Both Q to Q outputs are available from each flip-flop.• TTL/NMOS Compatible Input Levels\n• Outputs Directly Interface to CMOS, NMOS, and TTL\n• Operating Voltage Range: 4.5 to 5.5 V\n• Low Input Current: 1.0 µA; 0.1 µA @ 25°C\n• Outputs Source/Sink 24 mA

IN74ACT109D

DUAL J-K FLIP-FLOP WITH SET AND RESET

DUALJ-KFLIP-FLOPWITHSETANDRESET High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IN74ACT109D

Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IN74ACT109N

DUAL J-K FLIP-FLOP WITH SET AND RESET

DUALJ-KFLIP-FLOPWITHSETANDRESET High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IN74ACT109N

Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IN74ACT109D

Dual J-K flip-flop with set and reset high-speed silicon-gate CMOS;