3.3V CMOS 16-BIT EDGE TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

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3.3V CMOS 16-BIT EDGE TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD

文件：271.41 Kbytes 页数：6 Pages

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3.3V CMOS 16-BIT EDGE TRIGGERED D-TYPE FLIPFLOP

文件：106.62 Kbytes 页数：6 Pages

IDT

3.3V CMOS 16-BIT EDGE TRIGGERED D-TYPE FLIPFLOP

文件：106.62 Kbytes 页数：6 Pages

IDT

3.3V CMOS 16-BIT EDGE TRIGGERED D-TYPE FLIPFLOP

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Package：48-BSSOP（0.295"，7.50mm 宽）；包装：卷带（TR） 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 8BIT 48SSOP

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