3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 12-bit to 24-bit multiplexed D-type latch is built using advanced dual metal CMOS technology. The ALVCH16260 is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing an

文件：71.33 Kbytes 页数：7 Pages

IDT

3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 12-bit to 24-bit multiplexed D-type latch is built using advanced dual metal CMOS technology. The ALVCH16260 is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing an

文件：71.33 Kbytes 页数：7 Pages

IDT

3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This registered bus exchanger is built using advanced dual metal CMOS technology. The ALVCH16270 is used in applications in which data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Sk

文件：81.26 Kbytes 页数：7 Pages

IDT

3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This registered bus exchanger is built using advanced dual metal CMOS technology. The ALVCH16270 is used in applications in which data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Sk

文件：81.26 Kbytes 页数：7 Pages

IDT

3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This registered bus exchanger is built using advanced dual metal CMOS technology. The ALVCH16270 is used in applications in which data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Sk

文件：81.26 Kbytes 页数：7 Pages

IDT

3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This registered bus exchanger is built using advanced dual metal CMOS technology. The ALVCH16270 is used in applications in which data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Sk

文件：81.26 Kbytes 页数：7 Pages

IDT

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the

文件：111.76 Kbytes 页数：6 Pages

IDT

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the

文件：111.76 Kbytes 页数：6 Pages

IDT

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the

文件：111.76 Kbytes 页数：6 Pages

IDT

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the

文件：111.76 Kbytes 页数：6 Pages

IDT