3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. FEATURES: • 0.5 MICRON CMOS Technology • Typical

文件：91 Kbytes 页数：6 Pages

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3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. FEATURES: • 0.5 MICRON CMOS Technology • Typical

文件：91 Kbytes 页数：6 Pages

IDT

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. FEATURES: • 0.5 MICRON CMOS Technology • Typical

文件：91 Kbytes 页数：6 Pages

IDT

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. FEATURES: • 0.5 MICRON CMOS Technology • Typical

文件：91 Kbytes 页数：6 Pages

IDT

3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 18-bit universal bus driver is built using advanced dual metal CMOS technology. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) inp

文件：71.88 Kbytes 页数：6 Pages

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3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 18-bit universal bus driver is built using advanced dual metal CMOS technology. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) inp

文件：71.88 Kbytes 页数：6 Pages

IDT

3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 18-bit universal bus driver is built using advanced dual metal CMOS technology. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) inp

文件：71.88 Kbytes 页数：6 Pages

IDT

CMOS 16-BIT 3.3V TO 5V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 16-bit 3.3V to 5V level shifting transceiver is manufactured using advanced dual metal CMOS technology. The ALVC164245 contains two separate supply rails; B port has VCCB, which is set at 5V, and A port has VCCA, which is set to operate at 3.3V. This allows for translation from

文件：86.04 Kbytes 页数：8 Pages

IDT

CMOS 16-BIT 3.3V TO 5V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS

FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCCA = 2.7V to 3.6V • VCCB = 5V ± 0.5V • CMOS power levels (0.4μ W typ. static) • Rail-to-Rail output swing for increase

文件：252.72 Kbytes 页数：9 Pages

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CMOS 16-BIT 3.3V TO 5V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS

DESCRIPTION: This 16-bit 3.3V to 5V level shifting transceiver is manufactured using advanced dual metal CMOS technology. The ALVC164245 contains two separate supply rails; B port has VCCB, which is set at 5V, and A port has VCCA, which is set to operate at 3.3V. This allows for translation from

文件：86.04 Kbytes 页数：8 Pages

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