LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

文件：1.25545 Mbytes 页数：19 Pages

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LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

文件：287.29 Kbytes 页数：10 Pages

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LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

Renesas

瑞萨

Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer

Features • Fully integrated PLL • Fourteen LVCMOS/LVTTL outputs to include: twelve clocks, one feedback, one sync • Selectable differential CLK, nCLK inputs or LVCMOS/LVTTL reference clock inputs • CLK0, CLK1 can accept the following input levels: LVCMOS or LVTTL • CLK, nCLK pair can accep

文件：663.57 Kbytes 页数：21 Pages

RENESAS

瑞萨

Fully integrated PLL

文件：400.81 Kbytes 页数：19 Pages

IDT

Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer

文件：467.82 Kbytes 页数：20 Pages

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